The construction of nonvolatile memory cells (e.g., floating gate, charge trapping, or capacitor memory cells) includes a dielectric layer that functions to store an electrical charge corresponding to information in the memory cell. The proper functioning of the memory cell often relies on the ability to erase information in the memory by dissipating the stored charge. To dissipate the stored charge, typically a standardized voltage, or a series of standardized voltage pulses, is applied across the dielectric layer, thereby causing the stored charge to be removed. Sometimes, larger numbers of cells in batches of fabricated memory cells cannot be erased by the standardized voltage and, therefore, these cells are designated as failed cells. The failed memory cells are either scrapped or subjected to a rework process, thereby reducing the yield, and increasing the costs of producing functional memory cells.
Accordingly, what is needed is a method of manufacturing memory cells by a process that minimizes the fabrication of cells with erase failures.